axi4_master
clocked component
Active AXI4 master. Connect to the master modport. Pipelines up to
MAX_OUTSTANDING reads and writes with distinct IDs and matches each
response to its transaction by ID, so it handles a slave’s interleaved
out-of-order read data. Read data is self-checked. random_burst_writes /
random_bursts + verify_all give a randomized burst regression.
exclusive_read / exclusive_write exercise the locked read-modify-write
path; exclusive_ok reports whether the last exclusive write got EXOKAY.
Parameters
| STALL | u64 | optional | 0..=255 weight for randomly delaying BREADY/RREADY. |
|---|---|---|---|
| MAX_OUTSTANDING | u64 | optional | Maximum outstanding transactions per direction; unset means 4. |
Ports
| clk | input | clock | Bus clock. |
|---|---|---|---|
| rst | input | reset | Bus reset; drops in-flight bursts and clears the queues. |
| axi | modport | $std::axi4_if.master |
Methods
random_burst_writes(count: u64, addr_bits: u64, max_len: u64)
Queues count random INCR burst writes into a 2^addr_bits-byte
window (lengths up to max_len), recording each beat for verify_all.
random_bursts(count: u64, addr_bits: u64, max_len: u64)
Queues count random self-checking bursts with random type
(INCR/FIXED/WRAP) and random narrow size, per-beat byte strobes.
verify_all() -> u64
Queues a single-beat checked read of every written address; the reads pipeline (multiple outstanding). Returns how many.
read_check_incr(addr: u64, len: u64)
Queues an INCR burst read of len + 1 beats whose data is checked
against fill (each word equals its address). Interleaves with other
outstanding reads.
read_burst(addr: u64, len: u64)
Queues an INCR burst read of len + 1 beats; drain with pop_read.
pop_read() -> value[axi.DATA_WIDTH_BYTES * 8]
Pops the oldest read beat at full bus width, erroring if none.
idle() -> u64
1 when every queued and in-flight transaction has completed, else 0.
last_bresp() -> u64
Response code of the most recent write burst.
write(addr: u64, data: value)
Queues a single-beat normal write of data to addr.
exclusive_read(addr: u64)
Queues a single-beat exclusive read of addr (ARLOCK), arming the
slave’s monitor. Its data drains through pop_read like any other read,
sharing the same FIFO — pop it before issuing later reads if you need
the read-modify-write value.
exclusive_write(addr: u64, data: value)
Queues a single-beat exclusive write of data to addr (AWLOCK). It
succeeds (EXOKAY) only if the address is still reserved; check the
outcome with exclusive_ok once the write has drained.
exclusive_ok() -> u64
1 if the most recent exclusive write got EXOKAY (succeeded), else 0.
Usage
inst u0: $comp::axi4_master (clk, rst, axi: );