| INITIAL_VALUE |
bit
|
| PRECEDENCE_ACCESS |
rggen_sw_hw_access |
|
| SW_READ_ACTION |
rggen_sw_action |
|
| SW_WRITE_ACTION |
rggen_sw_action |
|
| SW_WRITE_ONCE |
bbool |
|
| SW_WRITE_CONTROL |
bbool |
|
| SW_WRITE_ENABLE_POLARITY |
rggen_polarity |
|
| HW_WRITE |
bbool |
|
| HW_WRITE_ENABLE_POLARITY |
rggen_polarity |
|
| HW_SET |
bbool |
|
| HW_SET_WIDTH |
u32 |
|
| HW_CLEAR |
bbool |
|
| HW_CLEAR_WIDTH |
u32 |
|
| STORAGE |
bbool |
|
| EXTERNAL_READ_DATA |
bbool |
|
| EXTERNAL_MASK |
bbool |
|
| TRIGGER |
bbool |
|
| i_clk |
input |
clock |
|
| i_rst |
input |
reset |
|
| bit_field_if |
modport |
rggen_bit_field_if bit_field |
|
| o_write_trigger |
output |
logic |
|
| o_read_trigger |
output |
logic |
|
| i_sw_write_enable |
input |
logic |
|
| i_hw_write_enable |
input |
logic |
|
| i_hw_write_data |
input |
logic
|
| i_hw_set |
input |
logic
|
| i_hw_clear |
input |
logic
|
| i_value |
input |
logic
|
| i_mask |
input |
logic
|
| o_value |
output |
logic
|
| o_value_unmasked |
output |
logic
|
|
|
|
|
|
|
|
|